Application of Neuron MOS in Analog Design

The neuron NIOS transistor (ruNlOS), recentlv discovered by Shibata and Ohmi [1] in 1991, simply uses capacitively coupled inputs onto a floating gate. The resulting output is simply a rveighted sum of the inputs, due to the capacitive input network, followed by a thresholding operation. The behaviour of the transistor resembles, very rvell, that of a biological neuron rvhere the turn-on of the transistor is parallelled by the firing of a neuron. In this respect, the device is called a neuron il4OSFET or a neu-N{OS (ru}IOS) for short. The structure, the symbol ancl the capacitance representation of the vNfOS transistor are shown in Figures 1.a-c. zN,IOS circuits operate s'ith mixecl mode analog/digital functions and can even perform Boolean logical operations that are dynamically reconfigurable. The use of zIIOS circuits rvill greatly increase functionalitylareal2l while still maintaining lo.¿' cost via the use of standard CN,IOS fabrication. In addition to neural networks the application areas v/ere ¡zNIOS v'ili have use are motion detectors [3,4,5] , monolithic imaging/compression, spatiaì light modulators (SLNIs) and optical neural arrays [6].